CD4046BE Phase Locked Loop

$24.94 $42.4
DescriptionCD4046B Microp­ow­er Phase-Locked Loop (PLL) con­sists of a low-pow­er, lin­ear volt­age-con­trolled oscil­la­tor (VCO) and two dif­fer­ent phase com­para­tors hav­ing a com­mon sig­nal-input ampli­fi­er and a com­mon com­para­tor input. A 5.2‑V zen­er diode is pro­vid­ed for sup­ply reg­u­la­tion if nec­es­sary.The CD4046B types are sup­plied in 16-lead her­met­ic dual-in-line ceram­ic pack­ages, 16-lead dual-in-line plas­tic pack­ages (E suf­fix), 16-lead small-out­line pack­ages (NSR suf­fix), and 16-lead thin shrink small-out­line pack­ages (PW and PWR suf­fix­es).FeaturesVery low pow­er con­sump­tion: 70 µW (typ.) at VCO fo = 10 kHz, VDD = 5 VOper­at­ing fre­quen­cy range up to 1.4 MHz (typ.) at VDD = 10 V, RI = 5 kLow fre­quen­cy drift: 0.04%/°C (typ.) at VDD = 10 VChoice of two phase com­para­tors:Exclu­sive-OR net­work (I)Edge-con­trolled mem­o­ry net­work with phase-pulse out­put for lock indi­ca­tion (II)High VCO lin­ear­i­ty: <1% (typ.) at VDD = 10 VVCO inhib­it con­trol for ON-OFF key­ing and ultra-low stand­by pow­er con­sump­tionSource-fol­low­er out­put of VCO con­trol input (Demod. out­put)Zen­er diode to assist sup­ply reg­u­la­tionStan­dard­ized, sym­met­ri­cal out­put char­ac­ter­is­tics100% test­ed for qui­es­cent cur­rent at 20 V5‑V, 10‑V, and 15‑V para­met­ric rat­ingsMeets all require­ments of JEDEC Ten­ta­tive Stan­dard No. 13B, “Stan­dard Spec­i­fi­ca­tions for Descrip­tion of ‘B’ Series CMOS Devices”Appli­ca­tionsFM demod­u­la­tor and mod­u­la­torFre­quen­cy syn­the­sis and mul­ti­pli­ca­tionFre­quen­cy dis­crim­i­na­torData syn­chro­niza­tionVolt­age-to-fre­quen­cy con­ver­sionTone decod­ingFSK — ModemsSig­nal con­di­tion­ing(See ICAN-6101) “RCA COS/MOS Phase-Locked Loop — A Ver­sa­tile Build­ing Block for Microp­ow­er Dig­i­tal and Ana­log Appli­ca­tions”DatasheetCD4046B TYPES (Rev. B)
General Ics

General Ics